13th IEEE European Test Symposium
Lago Maggiore, ITALY, May 25-29, 2008

 
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Industrial support to ETS'08
Fringe Workshops
Workshop on Reliability & DfX Engineering for System-in-Package Technologies - SiPeX
Workshop on Low Power Design Impact on Test and Reliability - LPonTR
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  ETS'08 - Program at a glance  
 
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technical program
program at-a-glance
 
Sunday 25th
 9:00 - 17:00
(at the hotel "Il Chiostro")
Tutorial 1
Tutorial 2
DFx: The convergence of test, manufacturing, and yield
Robert AItken, ARM
IEEE 1500 - Building a Compliant Wrapper
Teresa McLaurin, ARM
Tom Waayers, NXP
20:00 Welcome reception at hotel Majestic with
lakeside Italian flavors buffet 
 
Monday 26th
8:30 - 10:30
ETS'08 Plenary Opening
10:30 - 11:00
Coffee Break
11:00 - 12:30 Session 2A
Testing and Monitoring for High Quality Requirements
Session 2B
SoC Infrastructure
Session 2CVendor ATE Architectures
12:30 - 14:00 Lunch
14:00 - 15:30 Session 3A
Advances in RF Testing
Session 3B
Safe Test Generation and Design Validation
Session 3CVendor Parallel Testing
15:30 - 16:30 Session 4 - Posters and Coffee Break
16:30 - 18:00 Session 5A
News from Memory Test
Session 5B
Diagnosis: New Concepts and Industrial Application
Session 5CVendor
The power of DfT
18:00 - 19:30 Session 6A - Panel 1
Session 6B - Panel 2
Erik Larsson, Linkopings Universitet Erik Jan Marinissen, NXP
20:00 Evening in Pizzeria
 
Tuesday 27th
8:30 - 10:00 Session 7A
Delay Faults: Simulation, Test Generation and DFT
Session 7B
SoC Testing
Session 7CVendor
Potpourri
10:00 - 11:00 Session 8 - Posters and Coffee Break
11:00 - 12:30 Session 9A
On-Chip Resources for Mixed-Signal Devices
Session 9B
Special Session 1
Session 9CVendor
Test Engineering
Michael Wright, NASA
David Amason, NASA
Peter Harvey,
UC-Berkeley
12:30 - 14:00 Lunch
14:00 - 15:00 Session 10A
Embedded Tutorial 1
Session 10B
Embedded Tutorial 2
Session 10C
Embedded Tutorial 3
Bart Vermeulen,NXP
Nicola Nicolici,
McMaster University
Alfred Crouch, Inovys
Jeff Rearick, AMD
Ken Posse, AMD
Gordon Roberts,
McGill University
16:00 Social Program
 
Wednesday 28th
8:30 - 10:00 Session 11A
Solutions for Yield Enhancement
Session 11B
Online Checking
Session 11CVendor
Design-for-Test
10:00 - 11:00 Session 12 - Posters and Coffee Break
11:00 - 12:30 Session 13A
Embedded Tutorial 4
Session 13B
Special Session 2
Erika Cota, UFRGS
Marcelo Lubaszewski, UFRGS
Hans-Joachim Wunderlich,
Universität Stuttgart
12:30 - 14:00 Lunch
14:00 - 15:30 Session 14
Soft Error Mitigation

16:00 ETS'08 Closing Session
  
Thursday 29th - Fringe Workshops Day
8:30 - 17:00 Workshop on Reliability & DfX Engineering for System-in-Package Technologies - SiPeX Workshop on Low Power Design Impact on Test and Reliability - LPonTR

 IEEE tttc
Computer Society Politecnico di Torino

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