Warehouses at the river.

16th IEEE European Test Symposium
May 23-27, 2011

ETS-2011 Logo

Technical program

The technical programme is ready. You may download the programme booklet (4,5 MB).

Program at a glance

Download pdf.

Monday 23rd May

14:00 -
(TSS@ETS) Track A

Room R1
Embedded Memory Testing: Fault Models, Test Algorithms, MBIST and Industrial Results
Room R9
(TSS@ETS) Track B
Design for Test and Fault Tolerance for Nanoscale Circuits

The Monday embedded tutorials are part of the Test Spring School@ETS 2011 and they are open to all regular ETS attendees! The registration desk will be open one hour befor the tutorial starts.

The sessions at ETS 2011

The sessions at ETS 2011 are named after some of our famous Norwegians. You may read more at Wikipedia about the mathematician Niels Henrik Abel, the composer and pianist Edvard Grieg, the playwright and poet Henrik Ibsen and the scientist, explorer, diplomat, humanitarian and Nobel laureate Fridtjof Nansen.

Tuesday 24th May

  Abel Ibsen Nansen Grieg Lobby/ canteen
09:00 Opening session        
11:00         Posters and coffee
12:00 Converter testing Security Industrial testing (Vendor session) Power switches  
13:00         Lunch in canteen
14:30 Emerging technologies 3D technology Mixed signal and RF test    
16:00         Posters and coffee
17:00 Dependability Test data compression, compaction and diagnosis Test Equipment 1 (Vendor session)    
18:30     PhD forum    

Wednesday 25th May

  Abel Ibsen Nansen Lobby/ canteen
09:00 Advances in test Contactless and memory testing Test-EDA (Vendor session)  
10:30       Posters and coffee
11:30 ATPG 1 Analog production test Test Equipment 2 (Vendor session)  
13:00       Lunch in canteen
14:30 Embedded tutorial A:
Formal Verification of SoC – Industrial Experiences and Scientific Perspective
  Embedded tutorial B:
Towards Variation-Aware Test
15:45       Social event – bus departure

Thursday 26th May

  Abel Ibsen Nansen Lobby/ canteen
09:00 ATPG 2 Post silicon debug Industrial testing (Vendor session)  
10:30       Poster Session 4 and coffee
TTTC’s E. J. McCluskey Best Doctoral Thesis Award and Student Work-in-Progress
11:30 Panel A
Working Silicon versus Working Board/System: Closing the Gap
Panel B
Taking the Sense and Nonsense Out of Temperature-Aware Testing
Panel C
BIST for non-digital IPs: can we (do we need to) estimate test costs before production?
13:00       Lunch in canteen
14:30 Diagnosis      
16:00 Closing      

Thursday 26th - Friday 27th

Fringe workshops

Dependability Issues in Deep-submicron Technologies (DDT) IEEE International Workshop on Processor Verification, Test and Debug (IWPVTD’11) 4th IEEE International Workshop on Impact of Low-Power design on Test and Reliability (LPonTR’11)

Webmaster: Bjørn B. Larsen, Edited: 15.08.2011 - 15:46.