ETW'01
 
IEEE European Test Workshop
 
May 29 - June 1, 2001
Saltsjöbaden, Stockholm, Sweden


Call for Papers

General Chair / Vice-Chair
   Z. Peng - U. Linköping (S)
   D. Gizopoulos - U. Piraeus (GR)

Program Chair / Vice Chair
   H.-J. Wunderlich - U. Stuttgart (D)
   B. Bennetts - Ben. Assoc. (UK)

Local Chair / Vice-Chair
   G. Carlsson - Ericsson (S)
   E.J. Aas - Norw. U. of Science (N)

Publicity Chair
   H. Manhaeve - Q-Star Test (B)

Panel Chair
   C. Landrault - LIRMM (F)

Tutorials Chair
   P. Eles - U. Linköping (S)

Industrial Relations Chair
   E.J. Marinissen - Philips Research (NL)

Finance Chair
   G. Jervan - U. Linköping (S)

Publications Chair
   E. Larsson - U. Linköping (S)

Asia-Pacific Liasion
   K. Kinoshita - Osaka Gakuin U. (Japan)

Latin America Liasion
   F. Vargas - PUCR (Brazil)

North America Liasion
   R. Aitken - Agilent Tech. (USA)

Steering Committee
   B. Bennetts - Ben. Assoc. (UK)
   G. Carlsson - Ericsson (S)
   J. Figueras - U. Polit. de Catalunya (E)
   C. Landrault - LIRMM (F)
   E.J. Marinissen - Philips Research (NL)
   P. Muhmenthaler - Infineon (D)
   Z. Peng - U. Linköping (S)
   P. Prinetto - Polit. di Torino (I)
   J.P. Teixeira - INESC (P)
   H.-J. Wunderlich - U. Stuttgart (D)
   Y. Zorian - LogicVision (USA)

Program Committee (to include)
Topic Chairs:
  J. Alt - Infineon (D)
  S. Hellebrand - U. Innsbruck (A)
  H. Kerkhoff - U. Twente (NL)
  P. Prinetto - Polit. di Torino (I)

Members:
   E.J. Aas - Norw. U. of Science (N)
   B. Becker - U. Freiburg (D)
   A. Benso - Polit. di Torino (I)
   G. Carlsson - Ericsson (S)
   B. Courtois - TIMA CMP (F)
   W. Daehn - FEIH Wismar (D)
   P. Dahlgren - Chalmers U. Tech. (S)
   C. Ellingham - Synopsys (USA)
   J. Figueras - U. Polit.de Catalunya (E)
   H. Fujiwara - NAIST (J)
   F. Fummi - U. di Verona (I)
   D. Gizopoulos - U. Piraeus (GR)
   M. Hirech - Synopsys (USA)
   J. Hlavicka - Czech Technical U. (CZ)
   A. Hlawiczka - U. Gliwice (PL)
   J.L. Huertas - U. de Sevilla (E)
   M. Kessler - IBM (D)
   C. Landrault - LIRMM (F)
   M. Lobetti Bodoni - Siemens ICN (I)
   M. Lubaszewski - UFRGS (BR)
   H. Manhaeve - Q-Star Test (B)
   E.J. Marinissen - Philips Res. (NL)
   P. Maxwell - Agilent Tech. (USA)
   L. Miclea - U. Cluj-Napoca (RO)
   P. Muhmenthaler - Infineon (D)
   M. Ohletz - Alcatel Microelec. (B)
   A. Orailoglu - UC San Diego (USA)
   A. Osseiran - Fluence (CH)
   A. Paschalis - U. Athens (GR)
   Z. Peng - U. Linköping (S)
   M. Renovell - LIRMM (F)
   A. Richardson - U. Lancaster (UK)
   C. Robach - ESISAR (F)
   P. Sanchez - U. Cantabria (E)
   R. Segers - Philips Semicond. (NL)
   M. Sonza Reorda - Polit. di Torino (I)
   M. Spadari - LSI Logic (I)
   B. Straube - EAS/IIS FhG (D)
   J.P. Teixeira - INESC (P)
   R. Ubar - U. Tallinn (EE)
 
 

The IEEE European Test Workshop is a well-recognized forum for presenting and discussing trends, emerging results, and hot topics in the area of electronic-based circuit and system testing. In 2001, the workshop will take place at Saltsjöbaden, outside Stockholm city center, on one of the most beautiful islands in Sweden.

ETW'01 is sponsored by the IEEE Computer Society - Test Technology Technical Council (TTTC) and organized by Linköping University.

We cordially invite you to participate and submit your contribution to ETW'01, which includes (but is not limited to) the following topics:
 

Defect-oriented, Mixed-Signal and Analog Test:

  • Failure Analysis, Defect and Fault Modeling
  • Yield Analysis
  • IDDX Test
  • Analog, Mixed-Signal and RF Test
  • Thermal Testing
  • Signal Integrity Test

  •  
Design-for-Testability and BIST:

  • Scan-based Techniques and Boundary Scan
  • High Level DfT
  • On-Line and Off-Line BIST
  • Test Synthesis and Synthesis for Testability
  • Defect/Fault Tolerance and Reliability
  • Self-Repair Methodologies
     

System Test:

  • Test of Embedded Cores and System-on-Chip
  • Test of MCMs and Boards
  • Multi-Board System Test
  • Micro-System Test
  • Manufacturing Test
     

ATPG and Fault Simulation:

  • ATPG and High Level TPG
  • Fault Simulation
  • Debug and Diagnosis
  • Test of Memories, Microprocessors, Programmable Logic and MEMs

  •  

Submissions: The Program Committee invites original proposals which contain at least 1,000 and at most 5,000 words; full paper submissions are preferred. Electronic submission (using the workshop web page http://www.liu.se/etw01) in Postscript or PDF format is required. Please identify a contact author with his/her complete mailing address, phone number, fax number, and e-mail address.

Based on the very positive experience of previous ETWs, the Program Committee solicits also proposals concerning Industrial Experiences and Challenges. The deadline for industrial abstract submission is March 9, 2001 (New!).

Proceedings: On site ETW'01 will deliver handouts of the accepted contributions whose authors wish to provide the corresponding materials. After the workshop, formal proceedings of selected papers will be published by the IEEE Computer Society. The Program Committee will select the contributions to be included in the formal proceedings based on the review results and the quality of the papers included in the handouts. It is also expected that the best contributions will appear in a special issue of the Journal of Electronic Testing: Theory and Applications (JETTA), published by Kluwer.

Deadlines and Key Dates:
  • Submission of manuscripts: February 9, 2001
  • Submission of abstracts on industrial experiences and challenges: March 9, 2001
  • Notification of acceptance: March 23, 2001

IEEE Test Technology Educational Program (TTEP)

TTTC TTEP tutorials will be offered during May, 29th on emerging test technology topics. Tutorial proposals should be submitted according to the guidelines given at http://computer.org/tab/tttc/teg/ttep.

Further Information:
 

General Chair:

Prof. Zebo Peng
Linköping University
Embedded Systems Lab
SE-581 83 Linköping
Sweden
Tel.: +46-13-28 20 67
Fax: +46-13-28 26 66
E-mail: zpe@ida.liu.se
Program Chair:

Prof. Hans-Joachim Wunderlich
University of Stuttgart
Division of Computer Architecture
Breitwiesenstraße 20-22
70565 Stuttgart, Germany
Tel.: +49-711-78 16 391
Fax: +49-711-78 16 288
E-mail: wu@informatik.uni-stuttgart.de


Please visit the ETW'01 web page at: http://www.liu.se/etw01