Design and Manufacturing Technology of Advanced Multi-Die Packages on the ‘Slope of Enlightenment’: Where Is 3D-Test?
Thursday, May 27th, 2021, 15:00 – 16:10 UTC+2
|Moderator:||Jan Vardaman – President (TechSearch International, Inc. – Austin, TX, USA)|
|Panelists:||Dave Armstrong – Director of Business Development (Advantest – Lafayette, CO, USA)|
|Harry Chen – Scientist, IC Testing (MediaTek – Hsinchu, Taiwan)|
|Sandeep K. Goel – Academician/Deputy Director (TSMC – San Jose, CA, USA)|
|Yu Huang – EDA Chief Architect (HiSilicon – Shenzhen, China)|
|Teresa McLaurin – Fellow and Senior Director of DFT Architecture (Arm – Austin, TX, USA)|
|Organizers:||Michele Stucchi – Principal Member of Technical Staff (imec – Leuven, Belgium)|
|Erik Jan Marinissen – Scientific Director (imec – Leuven, Belgium)|
Abstract: When a new manufacturing IC technology starts getting the interest of test engineers, that is usually the sign of imminent introduction of a new product in the market.
Since the first paper on testing 3D-stacked integrated circuits (3D-SICs) interconnected by through-silicon vias was published by Lewis & Lee at ITC-2007, ‘advanced’ multi-die packages have gone through the subsequent stages of a fresh hype cycle (*), and we would currently position them at the end of the “slope of enlightenment”. During these years, 3D-SIC technology and design approaches, as well as target applications, have evolved quite a bit. Therefore, this is the appropriate moment to review, with a panel of experts, and YOU, the audience, where we, as the test community, stand now in 3D-test.
(*) “Gartner’s Hype Cycle is a graphical depiction of a common pattern that arises with each new technology or other innovation. Each year, Gartner creates more than 90 Hype Cycles in various domains as a way for clients to track technology maturity and future potential. The five phases in the Hype Cycle are Technology Trigger, Peak of Inflated Expectations, Trough of Disillusionment, Slope of Enlightenment and Plateau of Productivity.”