Tuesday Program

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UTC+2 Tuesday May 25, 2021
14:00 – 15:00
Keynote Address
From wearables to ingestibles and invisibles: disruptive new health devices and their path to maturity & the market

Vice-president R&D – imec – Leuven, Belgium
Moderator: Georges Gielen
15:00 – 16:00 Session 5 – Memory Test and Reliability
Chair(s): Martin Keim & Arnaud Virazel
15:00 – 15:20 S5-1 Detecting Random Read Faults to Reduce Test Escapes in FinFET SRAMs, Guilherme CARDOSO MEDEIROS (TU Delft – Netherlands), Moritz FIEBACK, Anteneh GEBREGIORGIS (Delft University of Technology – Netherlands), Leticia Bolzani POEHLS (Catholic University of Rio Grande do Sul – Brazil), Mottaqiallah TAOUIL, Said HAMDIOUI (Delft University of Technology – Netherlands)
15:20 – 15:40 S5-2 Run Time Management of Faulty Data Caches, Michail MAVROPOULOS (University of Patras – Greece), Georgios KERAMIDAS (Aristotle University – Greece), Dimitris NIKOLOS (U. Patras – Greece)
15:40 – 16:00 S5-3 ESD-PCM: Constructing Reliable Super Dense Phase Change Memory Under Write Disturbance, Wenke JIN, Siqi LU, Xiaojun CAI (Shandong University – China)
Industry Session 3 – Analog Defect Simulation in Industry
Chair(s): Hans Martin Von Staudt & Martin Andraud
15:00 – 15:20 IS3-1 Analog Defect Coverage – History, Status Now and Challenges Still Ahead of Us, Dieter HAERLE, Jaafar MEJRI, Thierry VERNET (Infineon Technologies – Germany)
15:20 – 15:40 IS3-2 Analog Defect Simulators – Initial Successes and Remaining Challenges, Anthony COYETTE, Wim DOBBELAERE, Ronny VANHOOREN (ON Semiconductor – Belgium) Jhon GOMEZ, Nektar XAMA, Georges GIELEN (KU Leuven – Belgium)
15:40 – 16:00 IS3-3 An Effective Iterative Method to Improve Mixed-Signal Manufacturing Test Quality, Fred FU, Yifan GE (HiSilicon – China)
16:00 – 16:30 Break & Vendor Booths
16:30 – 17:30 Session 6 – Sensors and Monitors for Safety and Security
Chair(s): Paolo Bernardi & Liviu Miclea
16:30 – 16:50 S6-1 (CS) A Plug and Play Digital ABIST Controller for Analog Sensors in Secure Devices, Sebastien LAPEYRE (INVIA – France), Marie-lise FLOTTES, Bruno ROUZEYRE, Arnaud VIRAZEL (LIRMM – France), Nicolas VALETTE, Marc MERANDAT (INVIA – France)
16:50 – 17:10 S6-2 (HT) Designing Recurrent Neural Networks for Monitoring Embedded Devices, Fin Hendrik BAHNSEN (Hamburg University of Technology – Germany), Jan KAISER (Deutsches Elektronen-Synchrotron DESY – Germany), Goerschwin FEY (TU Hamburg – Germany)
17:10 – 17:30 S6-3 (CS) SafeSU: an Extended Statistics Unit for Multicore Timing Interference, Guillem CABO, Francisco BAS, Ruben LORENZO, David TRILLA, Sergi ALCAIDE, Moretó MIQUEL, Carles HERNANDEZ (Barcelona Supercomputing Center – Spain), Jaume ABELLA (Barcelona Supercomputing Center (BSC-CNS) – Spain)
Vendor Session 2: OpenTAP Tutorial
Moderator(s): Erik Larsson & Jouke Verbree
16:30 – 16:50 VS2-1 Going Open (Source), The Future Of Test & Measurement Automation, Jeff DRALLA (Keysight Technologies – United States), Michael DIEUDONNE (Keysight Technologies – Belgium)
16:50 – 17:10 VS2-2 OpenTAP: The Open Source Path To Effortless Automation, Brennen DIRENZO (Keysight Technologies – United States)
17:10 – 17:30 VS2-3 OpenTAP Enables Massively Parallel Board Tester on Keysight System, Sivakumar VIJAYAKUMAR (Keysight Technologies – Singapore)
15:00 – 17:30 MCCluskey Award
MC-1 Leaky Hardware: Modeling and Exploiting Imperfections in Embedded Devices, Ilias GIECHASKIEL (University of Oxford)
MC-2 Testing STT-MRAM: Manufacturing Defects, Fault Models, and Test Solutions, Lizhou WU (Delft University of Technology)
MC-3 Security Techniques for Test Infrastructures, Emanuele VALEA (LIRMM – CNRS)
MC-4 Efficient Post-Silicon Debug Framework for Future Many-Core Systems, Sidhartha Sankar ROUT (Indraprastha Institute of Information Technology)
MC-5 Improving DRAM Performance, Security, and Reliability by Understanding and Exploiting DRAM Timing Parameter Margins, Jeremie KIM (Carnegie Mellon University)
MC-6 Assessing Dependability of ML-driven Systems, Saurabh Jha (University of Illinois at Urbana-Champaign)
MC-7 Effective techniques for systems validation and security, Aleksa Damljanovic (Politecnico di Torino)
17:30 – 18:00 Break & Vendor Booths
18:00 – 19:00 Session 7 – Miscellaneous
Chair(s): Marcello Traiola & Ernesto Sanchez
18:00 – 18:20 S7-1 Arithmetic Circuit Correction by Adding Optimized Correctors Based on Groebner Basis Computation, Negar AGHAPOUR SABBAGH, Bijan ALIZADEH (University of Tehran – Iran, Islamic Republic of)
18:20 – 18:40 S7-2 NeuroScrub: Mitigating Retention Failures Using Approximate Scrubbing in Neuromorphic Fabric Based on Resistive Memories, Soyed Tuhin AHMED, Michael HEFENBROCK, Christopher MÜNCH, Mehdi TAHOORI (Karlsruhe Institute of Technology – Germany)
18:40 – 18:45 S7-3 (P) Hierarchical Fault Simulation of Deep Neural Networks on Multi-Core Systems, Masoomeh KARAMI, Mohammad-Hashem HAGHBAYAN (University of Turku – Finland), Masoumeh EBRAHIMI (KTH – Sweden), Antonio MIELE (Politecnico di Milano – Italy), Hannu TENHUNEN (KTH – Sweden), Juha PLOSILA (University of Turku – Finland)
18:45 – 18:50 S7-4 (P) Analyzing the Impact of Approximate Adders on the Reliability of FPGA Accelerators, Ioannis TSOUNIS, Athanasios PAPADIMITRIOU, Mihalis PSARAKIS (University of Piraeus – Greece)
18:50 – 18:55 S7-5 (P) Online Testing of a Row-Stationary Convolution Accelerator, Mohammad Rasoul ROSHANSHAH, katayoon BASHARKHAH, Zainalabedin NAVABI (University of Tehran – Iran, Islamic Republic of)
Session 8 – Quantum
Chair(s): Salvador Mir & Swaroop Gosh
18:00 – 18:20 S8-1 Test Data-Driven Machine Learning Models for Reliable Quantum Circuit Output, Vedika SARAVANAN, Samah SAEED (City College of New York, City University of New York)
18:20 – 18:40 S8-2 ArsoNISQ: Analyzing Quantum Algorithms on Near-Term Architectures, Sebastian BRANDHOFER (University of Stuttgart), Simon DEVITT (University of Technology Sydney), Ilia POLIAN (University of Stuttgart)
18:40 – 18:45 S8-3 (P) Design of Fault-Tolerant and Thermally Stable XOR Gate in Quantum Dot Cellular Automata, Syed Farah NAZ, Ambika Prasad SHAH (Indian Institute of Technology Jammu), Suhaib AHMED (Baba Ghulam Shah Badshah University), Patrick GIRARD (LIRMM), Michael WALTL (Institute for Microelectronics, TU Wien)
Vendor Session 3: Wafer Probe Technology
Moderator(s): Jeroen De Coster & Stojan Kanev
18:00 – 18:20 VS3-1 Improving Parametric Test Quality and Efficiency With XP5 Probe Material, Joe Mai (JEM Europe – France), Romain LAVEVILLE, Guillaume DUTERTRE (ST Microelectronic – France)
18:20 – 18:40 VS3-2 Flexible Wafer-Level Optical Probing Solutions: Meeting the Cycle-Time Demands of Engineering to High-Volume Silicon Photonics Manufacturing, Dan Rishavy (FormFactor – United States)
18:40 – 19:00 VS3-3 Fine-Pitch WLCSP Spring Probe Pointing Accuracy and Wobble, Bert Brost (Technoprobe America – United States)
Regular Session (S)
Special Session (SP)
Embedded Tutorial (ET)
Industry Session (IS)
McCluskey Award
PhD Forum & Poster Session
Vendor Session
Regular Paper
(CS) Case Study Paper
(HT) Hot Topic Paper
(P) Poster
Best paper candidate