E.J. Aas - Univ. of Trondheim (NL)
K. Baker - Philips (NL)
S. Barbagallo - Italtel (I)
B. Becker - Univ.of Freiburg (D)
G. Carlsson - Ericsson (S)
M. Croft - Mentor Graphics (UK)
B. Courtois - TIMA CMP (F)
W. Dahen - SICAN GmbH (D)
C. Ellingham - Synopsys (USA)
J. Figueras - Univ. of Catalunya (E)
H. Fujiwara - NAIST (J)
C. Gauthron - Compass (F)
S. Griep - Siemens (D)
J. Hlavicka - Univ. of Czech (CZ)
A. Hlawiczka - Univ. of Gliwice (PL)
H. Kerkhoff - Univ. of Twente (NL)
G. Krueger - SNI (D)
C. Landrault - LIRMM (F)
C. Lopez Barrio - Telefonica I+D (E)
D. Medina - Italtel (I)
H. Manhaeve - KIHWV (B)
M. Nicolaidis - TIMA CMP (F)
P. Olivo - Univ. di Ferrara (I)
A. Paschalis - NCSR (GR)
Z. Peng - Univ. of Linkoping (S)
P. Prinetto - Politecnico di Torino (I)
M. Renovell - LIRMM (F)
J.P. Teixeira - INESC (P)
R. Ubar - Univ. of Tallinn (EE)
R. Wagner - Bosch (D)
T. W. Williams - IBM (USA)
V. Yarmolik - Univ. of Minsk (BY)
Y. Zorian - Lucent Bell Labs (USA)

Final Report

Official Picture...

The IEEE European Test Workshop 1997 has been a very successful workshop, where high-level technical discussions smoothly coexisted with a pleasant and relaxing atmosphere. The Workshop provided the ideal environment for cross-fertilizing industrial and academic experiences and needs. The workshop moved from Montpellier to another nice seaside resort in the Mediterranean area. 

The best contributions have been published in a special issue of the Journal of Electronic Testing: Theory and Applications (JETTA), published by Kluwer. 

The ETW'97 was sponsored by the IEEE Computer Society Test Technology Technical Committee, in cooperation with the European group of Test Technology Technical Committee (ETTTC).

WEDNESDAY, MAY 28 

• Key Note talk 
  • Long Term Research Aspects of Circuit Design and Test 
    Dr. Pierpaolo Malinverni - European Commission, DG III - Industry, Brussels, Belgium 
• POSTER SESSION 1 - High Level Testability 
• SESSION 2 - High Level Testing I 
• SESSION 3 - High Level Testing II 
• POSTER SESSION 2 - Structural Level Test Pattern Generation 
• SESSION 4 - Iddq Testing 
  
• Champion's League Final Match  (Juventus LOST!!!!!!)

• SESSION 5 - BIST and Fault Tolerance 
• POSTER SESSION 3 - BIST 
• SESSION 6 - Delay Faults & FPGA Testing
• SESSION 7 - Testing in Advanced Technologies 

• SOCIAL EVENT 

• SESSION 8 - Industrial Experiences
• POSTER SESSION 4 - Online and Analog Test in Practice 
• SESSION 9 - Analog and Mixed Signal Testing 
• SESSION 10 - Analog Testing