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| Session 7A: Fault Simulation and FPGA Testing | paper | slides | |
|---|---|---|---|
7A.1 |
A Parametrizable Fault Simulator
for Bridging Fault
P. Engelke* - B. Becker* - M. Keim** * Albert-Ludwigs Universitaet, Germany ** Infineon Technologies AG, Germany |
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7A.2 |
Hierarchical Defect-Oriented
Fault Simulation for Digital Circuits
M. Blyzniuk(1) - M. Lobur(1) - T. Cibakovà(2) - E. Gramatova(2) W. Kuzmicz(3) - W. Pleskacz(3) - J. Raik(4) - R. Ubar(4) (1) State University "Lvivska Politechnika, Slovakia (2) Institute of Informatics, Slovakia (3) Warsaw University of Technology, Poland (4) Tallinn Technical University, Estonia |
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7A.3 |
Analyzing the Test Generation
Problem for an Application-Oriented Test of FPGAs
M. Renovell *- J.M. Portal* - P. Faure* - J;Figueras** - Y. Zorian ' * LIRMM, France ** Universitat Politecnica de Catalunya, Spain ' LogicVision, USA |
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