PROGRAM

Session 1A:  Delay Testing and Test Scheduling

Session 1B: Scan and Functional Testing

Session 2A: System Testing

Session 2B: Design for Manufacturability and Yield  Improvement 

Session 3A: Idd* Testing

Session 3B: BIST in Practice

Session 5A: Production Test

Session 5B: SOC Test Methods and Experiences

Session 6A: Analog and Mixed-Signal Testing

Session 6B: Core-Based Testing

Session 7A: Fault Simulation and FPGA Testing

Session7B: Challenges in Deep Sub-Micron Testing

Session 9A: High Level Test

Session 9B: Memory Testing

Session 10A: BIST and Concurrent Testing

Session 10B: Board Testing

Session 11: BIST Architecture

Poster Session P1: Structural Testing

Poster Session P2: High-Level Test and Design Verification

Poster Session P3: Scan and DFT

Poster Session P4: Test Pattern Generation