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| Session 6A: Analog and Mixed-Signal Testing | paper | |
|---|---|---|
6A.1 |
IEEE 1149.4 Mixed-Signal Test
Bus Standard
A. Osseiran Fluence Technologies, Switzerland |
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6A.2 |
Static and Dynamic On-Chip
Test Response Evaluation Using a Two-Mode Comparator
D. De Venuto* - G. Matarrese* - M. J. Ohletz** * Politecnico di Bari, Italy ** Alcatel Microelectronics, Belgium |
|
6A.3 |
Towards an ADC BIST Scheme
using the Histogram Test Technique
F. Azaïs - S. Bernard - Y. Bertrand - M. Renovell LIRMM, France |
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