Session 3B: BIST in Practice paper

3B.1

BIST Insertion in a System on a Chip

M. Koscianski

S3 Silicon&Software Systems, Eire

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3B.2

On Integrating a Proprietary and a Commercial Architecture for Optimal BIST Performances in SoCs

M. Lobetti Bodoni* - M. Spadari**

 *  Siemens ICN, Italy

** LSI Logic, Italy


3B.3

Application of Deterministic Logic BIST on Industrial Circuits

G. Kiefer* - H.J. Wunderlich* - H. Vranken** - E.J. Marinissen**

  * University of Stuttgart, Germany

**  Philips Research Lab, The Netherlands

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Program

Authors