|
| Poster Session P2: High-Level Test and Design Verification | paper | |
|---|---|---|
| P2.1 | An On-Line BIST Structure
for Distributed Control Systems
L. Miclea - D. Cimpoca - M. Gordan Technical University of Cluj-Napoca, Romania |
|
| P2.2 | Test Infrastructure Design
and Test Scheduling Optimization
E. Larsson - Z. Peng Linköpings Universitet, Sweden |
|
| P2.3 | Matrix Description Specifics
for Synthesis of Self-Checking Micro-programmed Control Units
S.N. Demidenko* - E.M. Levine** * Massey University, New Zealand ** Rainbow Technologies, Belarus |
|
| P2.4 | The Use of VHDL Models for
Design Verification
B. Benyo - J. Sziray Széchenyi College, Hungary |
|
| P2.5 | Behavioral Adaptable Design
for Testability
T. Niculiu* - C. Aktouf** - C. Robach** * Universitatea Politehnica din Bucuresti, Romania ** INPG, France |
|
| P2.6 | RECCO: a Reliable c/c++ Code
Compiler for dependable applications
A. Benso - S. Chiusano - P. Prinetto Politecnico di Torino, Italy |
|
|
