|
| Session 11: BIST Architecture | paper | slides | |
|---|---|---|---|
| 11.1 | A Mixed Mode BIST Scheme Based
on Reseeding of Folding Counters
S. Hellebrand* - Hua-Guo Liang** - H.J. Wunderlich' * University of Innsbruck, Austria ** Hefei University of Technology, China ' University of Stuttgart, Germany |
||
| 11.2 | Fast and Low-Area TPGs based
on T-type Flip-Flops can be Easily Integrated to the Scan Path
T. Garbolino - A. Hlawiczka - A. Kristof Silesian University of Technology, Poland |
||
11.3 |
CA-CSTP: A new BIST Architecture
for Sequential Circuits
F. Corno - M. Sonza Reorda - G. Squillero - M. Violante Politecnico di Torino, Italy |
||
|
