General Info

 Call for Participation

 Call for Papers

 Author Instructions

  ETW'03 Program

 ETW'03 Registration

 Conference Location

8th IEEE European Test Workshop

 Crowne Plaza Hotel Maastricht,
The Netherlands

May 25 – 28, 2003

Call for Participation

The IEEE European Test Workshop is a well-recognized forum for presenting and discussing hot topics, trends, emerging results, and practical applications in the area of electronic-based circuit and system testing. The eighth edition of the workshop will take place in 2003 in Maastricht, The Netherlands, a town with historic roots that date back till the Roman Empire, but where also the treaty on the introduction of the Euro currency was signed by the European leaders.

We cordially invite you to participate in ETW’03. ETW’03 is sponsored by the IEEE Computer Society - Test Technology Technical Council (TTTC) and organized by Philips Research Laboratories.

Program: The high-quality ETW'03 technical program during May 26-28 offers a keynote speech, paper presentations in two parallel tracks, embedded tutorials, poster presentations, and breakout discussions. The paper presentations are organized in a Research Track and an Applications Track. The Research Track addresses novel concepts and methodologies, while the Applications Track reports on industrial and/or academic experiences, developments, and case studies. The ETW'03 program includes (but is not limited to) the following topics:

  • Analog, Mixed-Signal, and RF Test
  • ATE Hardware and Software
  • ATPG and High-Level TPG
  • Debug and Diagnosis
  • Defect/Fault Tolerance and Reliability
  • Design Verification/Validation
  • Emerging Testability Standards
  • Failure Analysis, Defect and Fault Modeling
  • Fault Simulation
  • FPGA Test
  • High-Level DfT
  • IDDX Test
  • Low-Cost Testers
  • Memory and Processor Test
  • MEMS Testing
  • On-Line and Off-Line BIST
  • Scan-Based Techniques and Boundary Scan
  • Self-Repair Methodologies
  • Signal Integrity Test
  • System Test
  • Test of Embedded Cores and System-on-Chip
  • Test of MCMs and Boards
  • Test Resource Partitioning and Embedded Test
  • Test Synthesis and Synthesis for Testability
  • Thermal Testing
  • Yield Analysis and Yield Enhancement

Tutorials: ETW'03 offers two full-day TTEP 2003 tutorials on May 25.

  • The tutorial on Testing (Embedded) Memories: New Fault Models, Tests, DfT, BIST, BISR, and Industrial Results, by Ad J. van de Goor (Delft University of Technology), discusses the more advanced topics in SRAM and DRAM testing. The tutorial addresses fault models, traditional memory tests as well as new march tests, testing two-port memories, optimal test strategies, DfT, BIST, and BISR techniques.
  • The tutorial on Defect-Oriented Testing, by Peter Maxwell (Agilent Technologies) and Rob Aitken (Artisan Components), discusses effective defect-oriented test methods for CMOS ICs. The tutorial addresses defects and failure mechanisms, fault models, model validation, test generation, application of defect-oriented testing for improving product quality and lowering cost, and future trends in CMOS technologies and nanotechnologies.

Social Event: ETW'03 offers a Social Event in the beautiful surroundings of Maastricht. The friendly, inspiring atmosphere of ETW'03 allows plenty of opportunities to meet and interact with your colleagues in an informal setting.

Registration: Discounts are offered with early registration until April 23. For registration and hotel reservation, please visit the ETW'03 registration web page.

Further Information:

Erik Jan Marinissen – General Chair
Philips Research Laboratories
Prof. Holstlaan 4 (WAY-41)
5656 AA Eindhoven, The Netherlands
Tel.: +31 40 274-3227
Fax: +31 40 274-4113
E-mail: Erik . Jan . Marinissen @ philips . com
Sybille Hellebrand – Program Chair
University of Innsbruck
Institute of Computer Science
Technikerstrasse 25, 6020 Innsbruck, Austria
Tel.: +43 512 507-6100
Fax: +43 512 507-2977
E-mail: Sybille . Hellebrand @ uibk . ac . at