10th European Test Symposium

Reval Hotel Olümpia, Tallinn, Estonia
May 22-25, 2005

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REASON Workshop
Testing of Digital Systems

Tallinn University of Technology, Estonia
TUT Campus at Mustamäe - Building 7
Room: VII-226
May 21, 2005.

- Tallinn and TUT
- TUT Campus at Mustamäe


8:30 – 9.15. Registration
9:15 Opening session
9:30 Self-Testing Systems
  Special Session of WP7
  1. M.Dascalu(Romanian Academy, Center for New Electronic Architectures),
    E.Franti (National Research and Development Institute of Microtechnology),
    C. Slav (“Politehnica” University of Bucharest)
    Cellular Automata Models for BIST Randomizers
  2. O.Oltu, P.L.Milea, A.Simion (“Politehnica” University of Bucharest)
    Advanced autotesting facilities implemented in high density FPGAs
10:30 – 11:00 Coffee break
  1. O.Oltu, P.L.Milea, A.Simion (“Politehnica” University of Bucharest)
    Testability maximisation of a critical application, using a logic analyzer implemented inside the testing FPGA circuit
  2. M.Dascalu (“Politehnica” University of Bucharest)
    MINAEAST-NET for promotion of MIcro and Nanotechnologies
12:00 – 13:00 Lunch
13:00 Educational Tools for Teaching Test
  Joint Spessial Session of WP3/WP8
  1. H.-D.Wuttke, T. Vangelov, M. Holbe (TU Ilmenau, Germany)
    Web-based learning in teaching test
  2. M.Fischerova, M.Balas, E.Gramatova, T.Pikula, M.Simlastik
    eTools for Teaching and Application of Digital Systems Testability Techniques (Institute of Informatics, Bratislava, Slovakia)
  3. A.Jutman, J.Raik, E.Orasson, R.Ubar (Tallinn University of Technology, Estonia)
    Overview of the educational tools developed in REASON
14:30 – 15:00 Coffee break
  1. R.Sheinauskas (Kaunas University of Technology, Lithuania)
    Functional test generator at high abstraction level
  2. O.Novak (Technical University of Liberec, Czech Republic)
    Handbook of Testing Electronic Systems
16:00 Closing session

Registration to the workshop:


On-site registration fee 15 EUR