13th IEEE European Test Symposium
Lago Maggiore
, ITALY, May 25-29, 2008
General Info
ETS'08 home
ETS home
committees
sponsors
ETS'08 Program
technical program
at-a-glance
tutorials
fringe meetings
social event
Industrial Support
Fringe Workshops
Workshop on Reliability & DfX Engineering for System-in-Package Technologies - SiPeX
Workshop on Low Power Design Impact on Test and Reliability - LPonTR
Registration
registration form
Conference Location
Verbania
how to get there
accommodation
Call for Paper
CfP
[html
/
pdf]
vendor sessions [pdf]
For Authors
submission instructions
paper submission
For Reviewers
reviewer login
For Companies
industrial support of ETS'08
vendor sessions
call for papers
vendor presentation submission
ETS'08 - Program at a glance
Download
printable version
technical program
program at-a-glance
Sunday 25
th
9:00 - 17:00
(
at the hotel "Il Chiostro"
)
Tutorial 1
Tutorial 2
DFx:
The convergence of test, manufacturing, and yield
Robert AItken
, ARM
IEEE 1500 - Building a Compliant Wrapper
Teresa McLaurin
, ARM
Tom Waayers
, NXP
20:00
Welcome reception at hotel Majestic with
lakeside
Italian flavors buffet
Monday 26
th
8:30 - 10:30
ETS'08 Plenary Opening
10:30 - 11:00
Coffee Break
11:00 - 12:30
Session 2A
Testing and Monitoring for High Quality Requirements
Session 2B
SoC Infrastructure
Session 2C
-
Vendor
ATE
Architectures
12:30 - 14:00
Lunch
14:00 - 15:30
Session 3A
Advances in RF Testing
Session 3B
Safe Test Generation and Design Validation
Session 3C
-
Vendor
Parallel Testing
15:30 - 16:30
Session 4 -
Posters
and Coffee Break
16:30 - 18:00
Session 5A
News from Memory Test
Session 5B
Diagnosis: New Concepts and Industrial Application
Session 5C
-
Vendor
The power of DfT
18:00 - 19:30
Session 6A -
Panel 1
Session 6B -
Panel 2
Commercial tools for RTL Design-for-Test exist but how good are they?
Erik Larsson
, Linkopings Universitet
No Beginners Beyond this Point
Erik Jan Marinissen
, NXP
20:00
Evening in Pizzeria
Tuesday 27
th
8:30 - 10:00
Session 7A
Delay Faults: Simulation, Test Generation and DFT
Session 7B
SoC Testing
Session 7C
-
Vendor
Potpourri
10:00 - 11:00
Session 8 -
Posters
and Coffee Break
11:00 - 12:30
Session 9A
On-Chip Resources for Mixed-Signal Devices
Session 9B
Special Session 1
Session 9C
-
Vendor
Test Engineering
NASA Flatsats: Spacecraft Testbeds for Mission Success
Michael Wright
, NASA
David Amason
, NASA
Peter Harvey
,
UC-Berkeley
12:30 - 14:00
Lunch
14:00 - 15:00
Session 10A
Embedded Tutorial 1
Session 10B
Embedded Tutorial 2
Session 10C
Embedded Tutorial 3
Post-Silicon Validation and Debug
Bart Vermeulen
,NXP
Nicola Nicolici
,
McMaster University
Update: the P1687 (IJTAG) Hardware Proposal for Efficient Embedded Instrument Access, Bandwidth, and Connectivity – the ABC’s of Embedded Content
Alfred Crouch
, Inovys
Jeff Rearick
, AMD
Ken Posse
, AMD
DFT/BIST Circuit Techniques Using Sigma-Delta Encoding Methods
Gordon Roberts
,
McGill University
16:00
Social Program
Wednesday 28
th
8:30 - 10:00
Session 11A
Solutions for Yield Enhancement
Session 11B
Online Checking
Session 11C
-
Vendor
Design-for-Test
10:00 - 11:00
Session 12 -
Posters
and Coffee Break
11:00 - 12:30
Session 13A
Embedded Tutorial 4
Session 13B
Special Session 2
Reliability, Availability and Serviceability of Networks-on-Chip
Erika Cota
, UFRGS
Marcelo Lubaszewski
, UFRGS
Collaborative Test Research in Europe
Hans-Joachim Wunderlich
,
Universität Stuttgart
12:30 - 14:00
Lunch
14:00 - 15:30
Session 14
Soft Error Mitigation
16:00
ETS'08 Closing Session
Thursday
29
th
- Fringe Workshops Day
8:30 - 17:00
Workshop on Reliability & DfX Engineering for System-in-Package Technologies - SiPeX
Workshop on Low Power Design Impact on Test and Reliability - LPonTR
© Copyright Politecnico di Torino
-
ets08@cad.polito.it