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When: Wednesday, May 30th
Title: Integrated Diagnostics for the Analysis of Electronic Failures in Vehicles: Project DIANA
Organizer: Piet Engelke (Infineon, DE)
DIANA, a research project funded by the German Federal Ministry of Education and Research, involves AUDI AG, Continental AG, Infineon Technologies AG, and ZMD AG. Together, the four partners are researching ways to improve the analytic and diagnostic capabilities of electronic control units (ECU) in motor vehicles. Assisted by several research organizations and universities, they are working on ways to make error detection more precise, and faults easier to rectify for automakers and repair shops. The ultimate goal is to establish a seamless diagnosis chain, ranging from semiconductor test to the diagnosis at the repair shop. To enable this diagnostic capability in the system, its basis, the integrated circuits (IC), have to provide detailed diagnostic data. This is a radically new requirement which will affect the way in which future automotive ICs are designed and tested.

Title: Introducing MEDIAN: a new COST Action on manufacturable and dependable multicore architectures at nanoscale
Organizer: Marco Ottavi (University of Rome "Tor Vergata", Italy)
The MEDIAN project is a COST Action aimed at creating a European network of competence and experts on all dependability aspects of future digital systems development, promoting collaboration between industry and research. The motivation for this project is the reckoning that both technology and architectures are today at a turning point. At the technological level many ideas are being proposed to extend CMOS technology as well as to find alternatives to it like CNTFET, QCA, memristors, etc, and at the architectural level, the spin towards higher frequencies and aggressive dynamic instruction scheduling is being replaced by the trend of including many simpler cores on a single die. These paradigm shifts will require a rethinking of design, manufacturing, testing, and validation of reliable next-generation systems. Manufacturability and dependability issues will be resolved efficiently only with a cross-layer approach that takes into account not only technology, circuit and architectural aspects, but also application scenarios. The project's final goal therefore is to contribute to the constant advances in manufacturing yield and on field reliability that have enabled the pervasive presence of electronic devices pervading our lives by fruitful collaboration and exchange of knowledge between the design and manufacturing side and three different application scenarios: space, medical, and transportation.
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When: Tuesday, May 29th
Title: Reducing Test Cost for Mixed Signal Circuits "From TOETS to ELESIS"
Organizer: Mohamed Azimane (NXP Semiconductors, The Netherlands)
The production testing of Integrated Circuits (ICs) is, currently, carried-out resorting to large and expensive Automated Test Equipment (ATE). A disadvantage of this approach is that while the production cost of a transistor decreases with each new technology node, the cost of testing remains flat or increases, particularly for ICs with analogue, RF or sensors components (concerning ~80% of IC test costs). If test features are built into the chip, making therefore part of the silicon, they would ensure that the benefits of silicon scaling to new technology nodes translate to benefits in testing cost. The concept of Built-In Self-Test (BIST) is a well-known solution for digital logic and memories but it is still in its infancy as far as analogue, RF and sensors are concerned. Although solutions do exist for analogue, RF and sensor blocks they are typically ad-hoc and point solutions and are only applicable to a specific block.
The ELESIS project addresses these challenges for test and reliability by promoting the development of a framework of embedded test instruments which are controlled through a common interface.

Title: FP7 Collaborative Research Project DIAMOND: Diagnosis, Error Modeling and Correction for Reliable Systems Design
Organizer: Jaan Raik (U. of Talinn, Estonia)
The DIAMOND project is set to cut development costs for Europe's nanoelectronics industry by simplifying error diagnosis and correction in systems. The project reaches beyond current state of the art by taking an integrated approach to localization and correction of different kinds of errors at various levels. In particular, DIAMOND has a focus on automated design error debug, soft error analysis and post-silicon in situ debug fields.  The aim is to provide a holistic, systematic methodology and an integrated environment for diagnosis and correction of different types of errors. The DIAMOND consortium includes universities from Estonia, Sweden, Germany and Austria as well as large companies like IBM, Ericsson and two SMEs TransEDA and Testonica Lab.

Title: Dependable Embedded Systems
Organizer: Jorg Henkel (KIT, DE)
The talk gives an overview of the DFG (German Research Foundation) Priority Program on Dependable Embedded Systems. Background: when migrating to the next technology nodes, dependability becomes a major design problem as variability, aging and susceptibility to soft errors increase. The purpose of this program is to research cross-layer solutions that address the physical problems at system-level i.e. at hardware-level, operating system level, application level etc. The first part of the talk gives an overview of dependability problems while the second part gives examples of how these problems are addressed at various levels of abstraction.
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Special Session 2C: Project ELESIS, DIAMOND and SPP 1500

Special Session 4C: Projects DIANA and MEDIAN

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